Area array contact structures provide a two dimensional planar pattern of contact sites. This would typically involve square or rectangular two dimensional arrays of PC board pads which must be connected to a corresponding array of sites in a connector or on the surface of a packaged electrical component, such as a land grid array (LGA) semi-conductor package. The current trend is directed toward designing such electrical connectors to provide interconnections as described above to provide both high density and high reliability connections between the various connection points. Higher reliability for such connections is essential due to potential end product failure should vital misconnections of these devices occur. It is also highly desired that such connections be separable and reconnectable in the field within the final product, as well as tolerant of dust and debris. Such a capability is also desirable during the manufacturing process to facilitate testing.
Shrinking packages and increased I/O requirements are driving the trend toward area array package configurations for microprocessor and ASIC chips, as well as other varieties ("chip scale packages"). Pin Grid Array (PGA) packages were an early area array configuration, but are now largely obsolete for new applications due to trace routing problems resulting from through-hole board mounting requirements. Ball Grid Array (BGA) packages replaced the PGA pins with small spherical balls of solder (63/37 SnPb), which reflow during mounting onto a pc board surface. BGA packages are difficult to socket because of the poor mechanical properties of the solder balls. LGA packages are simpler to manufacture than BGAs, and are potentially socketable. However, the socket must be a "Z-axis" socket, which delivers a clamping force to retain the chip in contact against the board, while overcoming the spring contacts within the socket. Since these chips may have 1000, 2000, and more contacts, this clamping force reaches into the hundreds of pounds when using conventional levels of individual contact force. The support structure and associated board stiffeners become unwieldy, expensive, and impractical. So there is substantial interest in reliable, low force contact systems.
At the same time, there is great demand for high speed performance from the chips and their sockets. This manifests itself as a requirement for contacts with low self inductance. Also, contact pitch is in the process of moving downward. Furthermore, contact working compliance is a requirement in a socket in order to absorb out-of-plane aspects of the mounting PC board and in the chip package as well.
U.S. Pat. No. 5,248,262 discloses an electrical connector for interconnecting a pair of circuit members. The connector includes a housing adapted for being located between the two circuit members. At least one elongated compressable contact member is secured within the housing. The contact occupies a first, prestressed position before engagement and is adapted for moving to a second, compressed position during the engagement. The electrical connector provides a two dimensional area array interconnect between the circuit members.
What is needed is a separable, low force, low inductance, high compliance, high density area array interconnect which provides a high pin count application with a high contact density and is manufactured in a cost productive manner.